KC145S0992 | 2019-01-22

Embedded flash controller is designed to control embedded flash memory macro on the devices. This IP is based on AMBA AHB bus interface and configurable for buffer size and timing parameters

- AMBA AHB bus interface - Flexible flash memory configuration - Buffer size configurable - Timing parameter configurable - Supports Samsung LF6 eFlash macro

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KC145H0991 | 2019-01-21

128bit eFUSE macro IP is proven on the Samsung LF6 technology platform

- 128bit density - Macro size is 241.18um x 76.665um - Addressed selection for fuse programming and full 128-bit data output for two 64bit banks are provided - The 128bit fuse block is designed to allow tester control of sense timings

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KU471S0990 | 2019-01-21

Public-key cryptography is an asymmetric-key cryptographic system that uses a pair of keys; public key and private key. The Binary Field ECC Core (BF-ECC) IP supports the elliptic curve cryptography (ECC) over binary field GF(2^m) defined by NIST Std. FIPS PUB 186-4. The BF-ECC IP computes elliptic ……

- It supports ten elliptic curves over GF(2^m) defined by NIST Standard - It supports five field sizes of 163/233/283/409/571-bit, and it also supports both pseudo-random curves and Koblitz elliptic curves - It adopts the Montgomery ladder algorithm as an underlying algorithm for ECPSM - It featu……

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KU471S0989 | 2019-01-21

Public-key cryptography is an asymmetric-key cryptographic system that uses a pair of keys; public key and private key. The Dual Field ECC Core (DF-ECC) IP supports the elliptic curve cryptography (ECC) over both binary field GF(2^m) and prime field GF(p) defined by NIST Std. FIPS PUB 186-4. The DF-……

- It supports elliptic curve cryptography (ECC) over both binary field and prime field defined by SEC2 - It performs four point operations over ECs including ECPSM, ECPA, ECPD, ECPS, and five modular operations including MA, MS, MM, MD, MI - It adopts the Montgomery ladder algorithm as an underlyi……

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KU296H0976 | 2019-01-05

A current-mode Hall plate is designed as a vertical type to detect magnetic field parallel to the sensor surface, and the following trans-impedance and HPDSM are used to amplify and digitize the desired signal. The vertical-type Hall-effect sensor consists of a vertical-type Hall plate, a low noi……

- Fabrication Technology: Magna 0.18 μm CMOS(HL18GF) MPW - Pure Internal Voltage Reference - Supply Voltage : 1.8 V , 2.5V - Sampling frequency : 10 kHz - Power Consumption: 40 mW - Effective Number of Bit: 13 bit - Size: 1.7 mm X 2.2 mm

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KU296H0975 | 2019-01-02

The hall plate is designed as a cross-shaped structure, and the spinning current method is applied to separate the Hall voltage and the offset voltage of the hall plate. In addition, HPDSM is used to separate the offset voltage and 1 / f from the desired signal. The Delta-sigma modulator consis……

- Synthesis Technology: Magna 0.18 μm CMOS(HL18GF) MPW - Pure Internal Voltage Reference - Supply Voltage : 1.8 V , 2.5V - Sampling frequency : 10 kHz - Power Consumption: 25.2 mW - Effective Number of Bit: 13 bit - Size: 1.4 μm X 1.4 μm

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KC054H0974 | 2018-12-26

Hall Effect sensors, which are capable of measuring small changes in magnetic field, have a wide range of applications, including smart device, automotive, and consumer electronics. Their performance, size and low cost have made them the most popular type of magnetic devices. This is true since Hall……

- Cross-shaped hall plate - Synthesis Technology: Magna 0.18 ？m BCDMOS - Supply Voltage: 1.8 V - Magnetic Field Range: 0 to 20mT - Maximum Hall Voltage: 0.52 V@20mT - 8-type die with different hall plate size: (a) 21.76 umX21.76 um (b) 121.76 um X 121.76 um (c) 19.76 um X？19.76 um (d) 13.……

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KC022H0973 | 2018-12-14

This IP is a 16-bit, 100kHzSPS analog-to-digital converter (ADC). The device operates from a supply range from 2.7V to 3.6V.Analog Input Range is VDD. The device includes a capacitor based SAR A/D converter with inherent sample and hold. The serial interface in each device is controlled by the SOC ……

- 100-KHz Sample Rate Serial Device - 16-Bit Resolution - Supply Range: 2.7 V to 3.6 V - INL : ±1.0 LSB (Typical) - DNL: ±1.5 LSB (Typical) - Power Down Current: 1 μA - 8-channel inputs - 3P5M Layout structure based on Samsung 80nm CMOS process - Die size : 675x430 um2

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