KU471S0960 | 2018-11-27

Public-key cryptography is an asymmetric-key cryptographic system that uses a pair of keys; public key and private key. The Public-Key Crypto-Core (PKCC) IP supports both the elliptic curve cryptography (ECC) over prime field GF(p) and the RSA defined by NIST Std. FIPS PUB 186-4. The PKCC IP compute……

- Supports five elliptic curve cryptography (ECC) over GF(p) defined by NIST Std. FIPS PUB 186-4 and RSA with key length of 1024, 2048, 4096-bit - Performs four point operations over ECs including ECPSM, ECPA, ECPD, ECPS, and six modular operations including RSA, MA, MS, MM, MD, MI - Adopts the m……

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KC022H0959 | 2018-11-26

The PLL have been developed as phase locked loops in a variety of applications. This PLL generates 60~300MHz clock referenced at 8~20MHz. The output clock frequency is selected by the resister M<1:0>, N<6:0> “FOUT = FIN/M*N”

- Supply voltage : 1.35V ~ 1.65V - Fully Integrated VCO - Integer ？ N PLL - Programmable Charge Pump Current - Input Reference Frequency range: 8MHz to 20MHz

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KU360S0956 | 2018-10-19

In this digital IP, we design a GMM based object detection algorithm for low power system. The designed IP introduce the modified weight update algorithm to utilize the symmetric structure. In this weigh update scheme, each weight parameters are updated respectively. To be robust to dynamic backgrou……

- GMM object detection algorithm is applied - Fully pipelined for real-time processing of HDs (1920 \times 1080) - Supporting clock frequency : 125 MHz - Low power consumption : 10.3 mW - Functional & 65nm CMOS cell library Verification

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KC567H0955 | 2018-08-07

This LDO is optimized for a wide variety of applications by supporting an input voltage range from 2.8 V to 5.0 V and an externally adjustable output range of 0.55 V to 3.3 V. The low output voltage enables this LDO to power the modern microcontrollers with lower core voltages.

- Low Line regulation - Low load regulation - 50mA supply - 3.3V ~ 5V - 1.8V output - Output level 1.5V ~ 1.8V - Bandgap include - Reference voltage supply

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KC603S0954 | 2018-07-05

ENLIGHTTM Neural Processing Unit (NPU) Deliver unrivaled compute density and energy efficiency ENLIGHTTM Neural Network Compiler Optimize user’s deep neural networks for perfect fit to ENLIGHTTM NPU

- Inherent efficiency by flexible Mixed-Precision - Processing; 4-/8-/16-bit operation mix - Scalable performance according to bit-precision choice - Up to 4x compute density & low-power consumption with 4-bit MAC - Competitors - at best an array of 8-/16-bit MAC - Without losing prediction ac……

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KC081H0953 | 2018-06-29

This is a low-power multi-input 12-bit ADC IP with a core sampling rate 1 MSPS. The SHM018C1201S employs an input buffer together with a successive approximation architecture. The SHM018C1201S has an on-chip voltage reference and an external reference can also be chosen.

- Resolution : 12-bit - Sampling Frequency : 1 MSPS - Power consumption : 0.6 mW @ 1 MSPS(typical condition) - Power supply : 1.8 V - Input capacitance : 0.1 pF (typical condition) - Area : 773 x 548 um2 (0.424 mm2)

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KC081H0952 | 2018-06-29

This LDO is a linear voltage regulator for embedded application that requires an internal power supply lower than the external power supply voltage. It is operated by 3.3V and delivers a steady output of 1.2V +/- 5%. The regulator is equipped with bandgap voltage reference and tunable output voltage……

- 3.3V Single I/O Power supply - 20mA output current(up to 25mA) - Low power consumption : Max. 45uA@VD33=3.3V . Output voltage range: 1.2V +/- 5% - On-chip voltage reference - Tunable output voltage

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KC050H0949 | 2018-06-08

The IP is a programmable gain amplifier (PGA), which consists of single ended amplifier, input and output switches, 14-selectable gain paths, and other control logic. The L7SPGA4B10G, operating with 5.0V analog power supply and 1.5V digital power supply, consumes 6.0mW power.

- SAMSUNG 100nm CMOS technology - Wide Operating Range . AVDD : 2.7V to 5.5V - Gain Step from 2.5 to 10 & Unit gain - Input Range . AVDD*0.04 to AVDD*0.36 @ Gain=2.5 . AVDD*0.02 to AVDD*0.18 @ Gain=5.0 . AVDD*0.01 to AVDD*0.09 @ Gain=10.0 - 16-channel single-ended inputs - Gain Error : ……

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