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  • 기업 IP
  • 대학·연구소 IP
  • N관련된 신규용역가능
  • M수정/가공 판매가능
  • T기술지원 가능
  • P현 상태로만 판매가능
total: 13/810 IP Cores
    • 기업 IP
    • M
    • T

    USB 1.1 PHY

    The 3.3v USB1.1 device PHY is capable of transmitting and receiving serial data at both full speed (12Mbit/s) and low speed (1.5Mbit/s) data rates. It is designed to meet standard logic to interface with the physical layer of the universal serial bus.

    KC022H1011 | 2019-11-19

    • 기업 IP
    • M

    USB 1.1 PHY

    The 3.3v USB1.1 device PHY is capable of transmitting and receiving serial data at both full speed (12Mbit/s) and low speed (1.5Mbit/s) data rates. It is designed to meet standard logic to interface with the physical layer of the universal serial bus.

    KC022H0968 | 2018-12-06

    • 기업 IP
    • N
    • M
    • T

    USB2.0 Device PHY with UTMI@SMIC 0.13um

    This IP is a USB 2.0 physical layer transceiver (PHY) integrated circuit. It supports 480Mbps High-speed transfer rate and 12Mbps full-speed transfer rate. This IP delivers low power dissipation and die dimension, compared other solutions, which is ideal for building a bus powered USB 2.0 peripheral. This IP complies..

    KC010H0486 | 2014-01-24

    • 대학·연구소 IP
    • T

    USB 1.1 full-speed device PHY

    USB 1.1 device PHY IP complies with the USB 1.1 specification and USB Transceiver Macrocell Interface (UTMI). USB 1.1 device IP is implemented by Verilog. This IP consists of SYNC generator/detector, bit sutffer/unstuffer, NRZI encoder/decoder, and Serializer/Deserializer. This IP accepts 60MHz clock as input. This IP ..

    KU227S0474 | 2013-12-12

    • 기업 IP
    • N
    • M
    • T

    USB2.0 Device PHY with UTMI

    This IP is a USB 2.0 physical layer transceiver (PHY) integrated circuit. It supports 480Mbps High-speed transfer rate and 12Mbps full-speed transfer rate. This IP delivers low power dissipation and die dimension, compared other solutions, which is ideal for building a bus powered USB 2.0 peripheral. This IP complies..

    KC010H0336 | 2013-04-02