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    MIPI DSI Receiver Controller

    The MIPI DSI Receiver Controller IP is fully compliant to the MIPI Alliance Standard for Display Serial Interface specification Version 1.1. The IP can controll 1 clock lane of CIL-SCNN and up to 4 data lanes of CIL-SFAA and process data strem at the rate of 80Mbps~1.2Gbps from each data lane.The IP can be paired with ..

    KC586H0856 | 2017-02-17