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  • 기업 IP
  • 대학·연구소 IP
  • N관련된 신규용역가능
  • M수정/가공 판매가능
  • T기술지원 가능
  • P현 상태로만 판매가능
total: 28/810 IP Cores
    • 대학·연구소 IP
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    Low EMI 10 bit 1 MS/s SAR-ADC

    A low EMI 10 bit 1 MS/s SAR-ADC with Selectable EMI reduction circuit for applications with EMI limitation.

    KU359H0917 | 2017-11-06

    • 기업 IP
    • N
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    10bit 1M ADC

    The L7GAD10B001M IP is a successive approximation-register (SAR) type analog-to-digital converter (ADC), which consists of an 8-channel input MUX, a digital-to-analog converter (DAC), a comparator, and control logic including a SAR. The L7GAD10B001M, operating with 3.3V analog power supply and 1.2V digital power supply..

    KC050H0878 | 2017-04-11

    • 대학·연구소 IP
    • T

    2016SG_Cyclic ADC with dual mDAC clock scheme

    Pipelined Analog-to-digital converters (ADCs) are largely dominant in the medium-to-high-speed application. Also conventional algorithmic ADCs with two mDAC are resolve each clock cycle, one bit in each clock phase. Therefore it cause total conversion time for N-bit is N/2 clock cycle. The proposed architecture apply a..

    KU085H0827 | 2016-09-13

    • 대학·연구소 IP
    • T

    10-bit 2.5MS/s 32uW input-dependent power-saving SAR ADC

    The proposed design is 10bit 2.5MS/s 32uW input-dependent power-saving SAR ADC for low-power operation that utilizes the input signal properties. The proposed scheme reads the difference of signal between two consecutive input signals by applying the most significant bits (MSBs) of the previous input signal. By effecti..

    KU462H0760 | 2016-04-08

    • 기업 IP
    • N
    • M
    • T

    10bit 10Msps ADC

    This ADC is low power analog-to-digital converter (ADC) IP. The 10-bit 10MSPS ADC includes an internal voltage reference. It is capable of selecting internal or external voltage reference. IP architecture is robust and can be ported to other 130nm processes. The ADC uses charge redistribution successive approxim..

    KC193H0749 | 2016-03-21