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  • 기업 IP
  • 대학·연구소 IP
  • N관련된 신규용역가능
  • M수정/가공 판매가능
  • T기술지원 가능
  • P현 상태로만 판매가능
total: 8/810 IP Cores
    • 기업 IP
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    AXI interconnection IP

    This AXI module to module interconnection IP make communicate between chip and chip with external I/O. This IP can operate with equivalent AXI functionality and equivalent AXI performance but less I/O.

    KC528S0697 | 2015-07-23

    • 대학·연구소 IP
    • N
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    Configurable AXI Interconnect

    Configuration AXI4 Interconnect supports the AXI4 protocol. The AXI4 interconnect can be configured according to the number of masters and slaves. The number of IPs can be from 8 to 24.

    KU195S0459 | 2013-11-22

    • 대학·연구소 IP
    • N
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    • T

    8x8 AXI Interconnect

    8x8 AXI3 Interconnect matrix has five independent channels of communication using handshaking, outstanding address and out-of-order completion transactions to support operation with improved efficiency of the communication protocol. It also supports slicing the network by inserting registers in the implementation of t..

    KU195S0458 | 2013-11-22

    • 대학·연구소 IP
    • N
    • M
    • T

    AXI protocol converter

    AXI4 protocol converter converts the protocols for communication between the AXI4 protocol and the AHB protocol. It accommodates both slave and master IPs, and converts the AHB 32bit data width to the 64bit data width of AXI, to support all the operations required by the protocol

    KU195S0454 | 2013-11-22

    • 대학·연구소 IP
    • N
    • M
    • T

    AXI DMAC

    AXI4 DMAC (Direct Memory Access Controller) transfers large amounts of data to increase the performance of a system because the data do not pass through the processors. It complies AMBA AXI4. It transfers data from IP to IP, from the Memory to the IP at high speed.

    KU195S0453 | 2013-11-22