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  • 기업 IP
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  • N관련된 신규용역가능
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  • T기술지원 가능
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total: 17/810 IP Cores
    • 기업 IP
    • M

    BOD

    This IP is a CMOS voltage detector for battery-powered applications. The device includes a comparator, a low-current reference, a divider, a hysteresis circuit, and an output driver. During operation, the output (BOD_Reset) remains in the logic-high state as long as AVDD is greater than the specified threshold voltage..

    KC022H0961 | 2018-12-06

    • 대학·연구소 IP
    • T

    A New Parametric Measurement Unit (PMU) Design with Improved Operating Range in Force Voltage Measure Current (FVMI) Mode

    A new technique of the parametric measurement unit (PMU) to measure DC parameter of the device under test (DUT). Only one differential difference amplifier (DDA) is used to force the test signal to the DUT, while conventional PMU uses two or more amplifiers. Moreover, to measure the response signal from DUT, a new tech..

    KU332H0847 | 2017-01-06

    • 기업 IP
    • N
    • M
    • T

    3.3V to 12V Logic Level Shifter

    This IP is a 3.3v to 12v level shifter. User can use this ip the system that 3.3v core signal changes to 12v core signal. In addition, can used asynchronous communication between two data buses. Input logic signal level is 0v to 3.3v and output signal level is 0v to 12v. Vih and Vil of input signal is the half of 3.3..

    KC193H0752 | 2016-03-21

    • 대학·연구소 IP
    • T

    A New Parametric Measurement Unit with Differential Difference Amplifier

    A new PMU(parametric measurement unit) design technique for automatic test equipment(ATE). Only one DDA(differential difference amplifier) is used to force the test signals to DUT(device under test), while conventional design uses two or more amplifiers to force test signals. Since the proposed technique does not need ..

    KU332H0726 | 2016-01-05

    • 대학·연구소 IP
    • T

    A 3Gb/s High-Speed True Random Number Generator Using Metastability of Comparator

    A 3Gb/s High-Speed True Random Number Generator Using Metastability of Comparator is fabricated in a 65 nm CMOS technology. The designed circuit has simple architecture and small area, 2700μm2. In spite of small size, the proposed TRNG achieves high speed data rate, up to 3Gb/s. Output random bit stream is verified by..

    KU064H0702 | 2015-09-21