Cache controller for Core-A On-Chip-Debugger
This IP is Cache controller for Core-A that includes On-Chip-Debugger. The cache controller supports single step, break point set, memory read and memory write of OCD. The cache controller just supports hardware breakpoint of OCD. This cache controller is tested under complex audio decoding algorithm (MP3, AAC, SOLA). ..
Pulse Width Modulation
Pulse-width modulation (PWM), or pulse-duration modulation (PDM), is a modulation technique that controls the width of the pulse, formally the pulse duration, based on modulator signal information. Although this modulation technique can be used to encode information for transmission, its main use is to allow the contro..
Real Time Clock Controller
The Real Time Clock Controller works with an external 32768Hz crystal oscillator. It comprises second-counter to year-counter clock and calendar circuits that feature automatic leap-year adjustment up to year 2099, alarm and tick-timer interrupt functions. Also it can be operated by the backup battery while the system ..
Full HD video controller with DDR2 using AMBA bus interface
HDVideo controller reads image data from frame memory with internal DMAC (Direct Memory Access Controller) and generates standard HSYNC/VSYNC/RGB video sequences, which can be fed to CRT, LCD or input of HDMI transmitter. It supports three different color modes including 32-bpp, 24-bpp, 16-bpp and 8-bpp.