USB 1.1 PHY
The 3.3v USB1.1 device PHY is capable of transmitting and receiving serial data at both full speed (12Mbit/s) and low speed (1.5Mbit/s) data rates. It is designed to meet standard logic to interface with the physical layer of the universal serial bus.
This IP is a precision analog output CMOS integrated-circuit temperature sensor that operates over ？45°C to 85°C. The power supply operating range is 2.4 V to 3.3 V. The transfer function of IP is predominately linear. The temperature error increases linearly and reaches a maximum of ±2.0°C at the temperature ran..
This IP is a high efficiency mono bridge-tried load (BTL) Power-stage for PWM(Pulse width modulation) driver . This IP can drive 8-Ω speaker. This IP features a low-power consumption shutdown mode, and short-circuit protection detector
The power on reset consists of a Schmitt trigger and simple logic for forced reset input, which
is forced asynchronous reset. Output port is, that means it is high to set flip-flop in particular state
PLLs have been developed as phase locked loops in a variety of applications.
The PLL generates 60~300MHz clock referenced at 8~20MHz.
The output clock frequency is selected by the resister M, N
“FOUT = FIN/M*N”