This IP is a 12-bit, 100kHzSPS analog-to-digital converter (ADC). The device operates from a supply range from 2.7V to 3.6V.Analog Input Range is VDD.
The device includes a capacitor based SAR A/D converter with inherent sample and hold. The serial interface in each device is controlled by the SOC and Clock signals. T..
CFAR Processor for Radar Signal Processor
This IP is a CFAR processor for radar signal processor. The environment of radar detection can be modeled as homogeneous and nonhomogeneous. The nonhomogeneous environments usually modeled as multiple target situation and clutter edge situation. Cell average (CA)-CFAR processor is the typical CFAR processor, but it per..
Pre-Processor for Radar Signal Processor
This IP is the pre-processor for radar signal processor, which eliminates DC component, clutter and interference and performs filtering for moving and stationary targets to improve detection accuracy.
The preprocessor IP consists of DC removal unit (DRU), Hamming window unit (HWU), moving target indicator (MTI) filt..
BUS Interface for automotive
The System Uses SPI(Serial Peripheral Interface Bus) communication to control high-speed automotive LED headlights and to detect errors using I2C(Inter-Integrated Circuit) communication. All Interfaces was designed in Verilog HDL, based on Philips I2C, SPI Standard Mode. The implemented LED controller System was verif..
USB 1.1 PHY
The 3.3v USB1.1 device PHY is capable of transmitting and receiving serial data at both full speed (12Mbit/s) and low speed (1.5Mbit/s) data rates. It is designed to meet standard logic to interface with the physical layer of the universal serial bus.